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?2006 silicon storage technology, inc. s71211-03-eol 4/06 1 the sst logo and superflash are registered trademarks of silicon storage technology, inc. these specifications are subject to change without notice. eol product data sheet features: ? industry standard ata/ide bus interface ? host interface: 8 or 16 bit access ? support up to pio mode-4 ? interface for standard nand flash media ? flash media interface: 8 bit access ? up to 1 gbit flash media components ? sst55ld017a: - supports up to 5 flash media devices directly for 128 mb maximum capacity ? sst55ld017b/sst55ld017c: - supports up to 5 flash media devices directly for 640 mb maximum capacity - supports up to 16 flash media devices with external decoder for 2 gb maximum capacity ? low power, 3.3v core operation ? 5.0v or 3.3v host interface through v ddq pins ? low current operation: ? active mode: 25 ma/35 ma (3.3v/5.0v) (typical) ? sleep mode: 40 a/50 a (3.3v/5.0v) (typical) ? power management unit ? immediate disabling of unused circuitry ? 20 byte unique id for enhanced security ? factory set 10 byte unique id ? user programmable 10 byte id ? pre-programmed embedded firmware ? performs self-initialization on first system power-up ? executes industry standard ata/ide commands ? implements wear-leveling algorithms to substantially increase the longevity of flash media ? embedded flash file system ? built-in ecc corrects up to 3 random 12-bit symbols of error per 512 byte sector ? internal or external system clock option ? write-protect (wp_pd#) pin for preventing data overwrites ? fast sustained read performance ? up to 5.0 mb/sec ? fast sustained write performance (host to flash) ? sst55ld017a supports up to 1.2mb/sec ? sst55ld017b supports up to 2.4mb/sec ? sst55ld017c supports up to 4.0mb/sec ? multi-tasking technology enables fast sustained write performance ? support for both commercial and industrial temperature ranges ? 0c to 70c for operating commercial ? -40c to +85c for operating industrial ? 100-lead tqfp package product description sst?s ata flash disk controller is the heart of a high-perfor- mance, flash media-based data storage system. the ata flash disk controller recognizes the control, address, and data signals on the ata/ide bus and translates them into memory accesses to the st andard nand-type flash media. this technology suits solid state mass storage applications offering new, expanded functionality while enabling smaller, low power consuming, and lighter designs. the ata/ide interface is widely used in such products as portable and desktop computers, digital cameras, music players, handheld data collection scanners, pdas, handy terminals, personal communicators, audio recorders, moni- toring devices, and set-top boxes. utilizing sst?s proprietary superflash embedded memory technology, the ata flash disk controller is preprogrammed with an embedded flash file system which, upon power-up, recognizes the flash media devices and performs all the necessary handshaking routines for flash media support. this enables the product manufacturer a completely seam- less integration of flash drive into an embedded design. the ata flash disk controller in tegrates an on-chip clock cir- cuitry and serial communication interface (sci) for system reset and user customization. the sst55ld017a is a standard performance ata disk controller supporting capacities up to 128 mb. sst55ld017b is a high-performance ata disk con- troller with sustained write performance up to 2.4 mb/ sec. sst55ld017c is a super high-performance ata disk controller with sustained write performance up to 4.0 mb/sec. both the sst55ld017b and sst55ld017c can support up to 5 flash media devices directly for a maximum capacity of 640 mb. by using an external decoder, the sst55ld017b and sst55ld017c can support up to 16 flash media devices for the equivalent capacity of 2 gb. users can select either an internal or external system clock option for optimal performance vs. the supply current. the ata flash disk controller comes packaged in an indus- try standard 100-lead tqfp package for easy integration into an smt manufacturing process. the ata flash disk controller also comes preprogrammed with a 10-byte unique serial id. for even greater system security and data protection, the user has the option of programming an addi- tional 10 bytes of id space to create a unique, 20 byte id. the controller also offers a wp_pd# pin to protect data stored on flash media from unauthorized overwrites. ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c sst55017a/b/cata flash disk controller
2 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table of contents product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 list of tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.0 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 performance-optimized ata flash disk controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.1 microcontroller unit (mcu). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.2 internal direct memory access (dma) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.3 power management unit (pmu) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.4 sram buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.5 embedded flash file system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.6 error correction code (ecc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.7 serial communication interface (sci) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1.8 multi-tasking technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.0 functional blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.0 pin assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.0 capacity specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 functional specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.0 serial communication interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.0 external clock interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.0 configurable write-protect/power-down modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.1 write-protect mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.2 power-down mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8.0 power-on and brown-out reset characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9.0 i/o transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 10.0 software interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.1 ata flash disk controller drive register set definitions and protocol. . . . . . . . . . . . . . . . . . . . . . . . 15 10.1.1 ata flash disk controller addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.1.2 ata flash disk controller registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.1.2.1 data register (read/write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 10.1.2.2 error register (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.1.2.3 feature register (write only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.1.2.4 sector count register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.1.2.5 sector number (lba 7-0) register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.1.2.6 cylinder low (lba 15-8) register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 3 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.1.2.7 cylinder high (lba 23-16) register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.1.2.8 drive/head (lba 27-24) register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.1.2.9 status & alternate status registers (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.1.2.10 device control register (write only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.1.2.11 drive address register (read only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10.1.2.12 command register (write only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10.2 ata flash disk controller command description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10.2.1 ata flash disk controller command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 10.2.1.1 check-power-mode - 98h or e5h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10.2.1.2 execute-drive-diagnostic - 90h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10.2.1.3 format-track - 50h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.2.1.4 identify-drive - ech . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.2.1.4.1 general configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.2 default number of cylinders. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.3 default number of heads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.4 default number of sectors per track . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.5 number of sectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.6 serial number. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.7 buffer type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.8 buffer size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.9 ecc count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.10 firmware revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.11 model number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.12 read-/write-multiple sector count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.13 capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.2.1.4.14 pio data transfer cycle timing mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.15 translation parameters valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.16 current number of cylinders, heads, sectors/track . . . . . . . . . . . . . . . . . . 25 10.2.1.4.17 current capacity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.18 multiple sector setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.19 total sectors addressable in lba mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.20 advanced pio data transfer mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.4.21 minimum pio transfer cycle time without flow control . . . . . . . . . . . . . . 25 10.2.1.4.22 minimum pio transfer cycle time with iordy . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.5 idle - 97h or e3h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10.2.1.6 idle-immediate - 95h or e1h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10.2.1.7 initialize-drive-parameters - 91h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10.2.1.8 read-buffer - e4h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10.2.1.9 read-multiple - c4h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10.2.1.10 read-long-sector - 22h or 23h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.2.1.11 read-sector(s) - 20h or 21h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.2.1.12 read-verify-sector(s) - 40h or 41h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 10.2.1.13 recalibrate - 1xh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 10.2.1.14 seek - 7xh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 10.2.1.15 set-features - efh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10.2.1.16 set-multiple-mode - c6h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1 10.2.1.17 set-sleep-mode - 99h or e6h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10.2.1.18 set-wp_pd#-mode - 8bh. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10.2.1.19 standby - 96h or e2h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10.2.1.20 standby-immediate - 94h or e0h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10.2.1.21 write-buffer - e8h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10.2.1.22 write-long-sector - 32h or 33h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10.2.1.23 write-multiple - c5h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.24 write-sector(s) - 30h or 31h. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.2.1.25 write-verify - 3ch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.2.2 error posting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11.0 electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 absolute maximum stress ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 11.1 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 11.1.1 input characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 11.1.2 output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 11.2 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11.2.1 host side interface i/o input (read) timing specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11.2.2 host side interface i/o output (write) timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 11.2.3 media side interface i/o timing specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.0 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 12.1 differences between sst ata flash disk controller and ata/atapi-5 specifications . . . . . . . . . . . 48 12.1.1 idle timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 12.1.2 recovery from sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 12.2 reference design schematics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 12.3 bill of materials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 13.0 physical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 14.0 product ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 14.1 valid combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 list of figures figure 2-1: sst ata flash disk controller block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3-1: pin assignments for 100-lead tqfp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 8-1: power-on and brown-out reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 figure 11-1: ac input/output reference waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 figure 11-2: host side interface i/o read timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 11-3: host side interface i/o write timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 figure 11-4: media command latch cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 11-5: media address latch cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 11-6: media data loading latch cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 figure 11-7: media data read cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 figure 12-1: schematic for ata flash module, up to 640 mbyte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 5 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 list of tables table 3-1: pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 3-2: host side interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 3-3: flash media interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 3-4: serial communication interface (sci) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3-5: external clock option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3-6: miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 4-1: default ata flash drive settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 4-2: functional specification of sst55ld017a/sst55ld017b/sst55ld017c. . . . . . . . . . . . . . 12 table 8-1: power-on and brown-out reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 9-1: i/o function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 10-1: task file registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 10-2: ata flash disk controller command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 10-3: diagnostic codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 10-4: identify-drive information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 10-5: features supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 10-6: transfer mode values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 10-7: error and status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table 11-1: absolute maximum power pin stress ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 11-2: recommended system power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 11-3: capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 11-4: reliability ch aracteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 11-5: input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 11-6: input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 11-7: input voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 11-8: input voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 11-9: input voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 table 11-10: input voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 table 11-11: output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 11-12: output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 11-13: output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 11-14: output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 11-15: dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 11-16: host side interface i/o read timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 table 11-17: host side interface i/o write timing specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 table 11-18: sst55ld017a/b/c timing parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 table 12-1: sample bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 table 12-2: optional components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 table 12-3: supported nand flash media . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
6 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 1.0 general description the sst?s ata flash disk controller contains a microcon- troller and embedded flash file system integrated in a 100- lead tqfp package. refer to figure 2-1 for sst?s ata flash disk controller block diagram. the controller interfaces with the host system allowing data to be written to and read from the flash media. 1.1 performance-optimized ata flash disk controller the heart of the flash drive is the ata flash disk controller which translates standard ata signals into flash media data and control signals. the following components contribute to the ata flash disk controller?s operation. 1.1.1 microcontroller unit (mcu) the mcu translates ata/ide commands into data and control signals required for flash media operation. 1.1.2 internal direct memory access (dma) the ata flash disk controller uses internal dma allowing instant data transfer from buffer to flash media. this imple- mentation eliminates microcontroller overhead associated with traditional, firmware-based approach, thereby increas- ing the data transfer rate. 1.1.3 power management unit (pmu) power management unit controls the power consumption of the ata flash disk controller. the pmu dramatically reduces the power consumption of ata flash disk controller by putting the part of the circuitry that is not in operation into sleep mode. 1.1.4 sram buffer a key contributor to the ata flash disk controller perfor- mance is an sram buffer. the buffer optimizes host?s data transfer to and from flash media. 1.1.5 embedded flash file system embedded flash file system is an integral part of the sst?s ata flash disk controller. it contains mcu firmware that performs the following tasks: 1. translates host side signals into flash media writes and reads. 2. provides flash media wear leveling to spread the flash writes across all unused memory address space to increase the longevity of flash media. 3. keeps track of data file structures. 1.1.6 error correction code (ecc) the sst?s ata flash disk controller utilizes 72-bit reed- solomon error detection code (edc) and error correc- tion code (ecc), which provides following error immunity for each 512-byte block of data: 1. corrects up to three random 12-bit symbol errors 2. corrects single bursts up to 25 bits 3. detects single bursts up to 61 bits and double bursts up to 15 bits 4. detects up to six rand om 12-bit symbol errors. 1.1.7 serial communication interface (sci) the serial communication interface is designed to enable the user to restart the self-initialization process and to cus- tomize the drive identification information. 1.1.8 multi-tasking technology multi-tasking technology enables fast, sustained write per- formance by allowing concurrent read, program, and erase operations to multiple flash media devices.
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 7 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 2.0 functional blocks figure 2-1: sst ata f lash d isk c ontroller b lock d iagram 1211 b1.6 host ata/ide bus ata flash disk controller multi-tasking interface nand flash media sci embedded flash file system mcu ecc internal dma sram buffer pmu
8 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 3.0 pin assignments the signal/pin assignments are listed in table 3-1. low active signals have a ?#? suffix. pin types are input, output or input/output. section 11.0 defines the dc characteris- tics for all input and output type structures. the ata flash disk controller functions in ata mode, which is compatible with ide hard disk drives. table 3-2 to table 3-6 describe the i/o signals. signals whose source is the host are designated as inputs while signals that the ata flash disk controller sources are out- puts. refer to section 11.0 for definitions of input and out- put types. figure 3-1: p in a ssignments for 100- lead tqfp 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 scid out scid in sciclk dnu v ss (io) dnu dnu dnu dnu dnu dnu dnu dnu v dd (io) dnu dnu dnu dnu v ss (io) intclken# dnu dnu v dd (core) por# fwp# v ss (core) frdybsy# fre# fwe# fcle fale fad0 fad1 fad2 v ss (io) extclk in extclk out v dd (io) fad3 fad4 fad5 fad6 fad7 v ss (io) fce0# fce1# fce2# fce3# fce4# scien# d10 d2 d9 d1 v ss (io) d8 d0 d7 d15 v ddq (io) iocs16# pdiag# v ss (io) dnu tie_up a0 a1 a2 tie_dn reset# tie_dn tie_dn v ddq (io) tie_dn tie_dn 1211 100-tqfp p01.0 tie_up tie_dn iowr# v ss (core) tie_dn iord# tie_dn tie_dn cs3fx# cs1fx# intrq v ss (io) dasp# wp_pd# csel v ddq (io) d14 d6 d13 d5 v ss (io) d12 d4 d11 d3 note: dnu means do not use, must be left unconnected. 100-lead tqfp top view
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 9 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table 3-1: p in a ssignments pin no. signal name pin type i/o type 1 1scid out oo1 2 scid in ii5z 3 sciclk i i5z 4dnu 2 5v ss (io) 6 dnu 7 dnu 8 dnu 9 dnu 10 dnu 11 dnu 12 dnu 13 dnu 14 v dd (io) 15 dnu 16 dnu 17 dnu 18 dnu 19 v ss (io) 20 intclken# i i5u 21 dnu 22 dnu 23 v dd (core) 24 por# i i5z 25 fwp# o o3 26 v ss (core) 27 frdybsy# i i6z 28 fre# o o3 29 fwe# o o3 30 fcle o o3 31 fale o o3 32 fad0 i/o i5u/o3 33 fad1 i/o i5u/o3 34 fad2 i/o i5u/o3 35 v ss (io) 36 extclk in ii6z 37 extclk out oo1 38 v dd (io) 39 fad3 i/o i5u/o3 40 fad4 i/o i5u/o3 41 fad5 i/o i5u/o3 42 fad6 i/o i5u/o3 43 fad7 i/o i5u/o3 44 v ss (io) 45 fce0# o o1 46 fce1# o o1 47 fce2# o o1 48 fce3# o o1 49 fce4# o o1 50 scien# i i5u 51 d3 i/o i2d/o4 52 d11 i/o i2d/o4 53 d4 i/o i2d/o4 54 d12 i/o i2d/o4 55 v ss (io) 56 d5 i/o i2d/o4 57 d13 i/o i2d/o4 58 d6 i/o i2d/o4 59 d14 i/o i2d/o4 60 v ddq (io) 61 csel i i1u 62 wp_pd# i i2u 63 dasp# i/o i2u/o2 64 v ss (io) 65 intrq o o2 66 cs1fx# i i3u 67 cs3fx# i i3u 68 t ie _dn 69 t ie _dn 70 iord# i i3u 71 t ie _dn 72 v ss (core) 73 iowr# i i3u 74 t ie _dn 75 t ie _up 76 t ie _dn 77 t ie _dn 78 v ddq (io) 79 t ie _dn 80 t ie _dn 81 reset# i i4u 82 t ie _dn 83 a2 i i2d 84 a1 i i2d 85 a0 i i2d 86 t ie _up 87 dnu 88 v ss (io) 89 pdiag# i/o i2u/o2 90 iocs16# o o4 91 v ddq (io) 92 d15 i/o i2d/o4 93 d7 i/o i2d/o4 94 d0 i/o i2d/o4 95 d8 i/o i2d/o4 96 v ss (io) 97 d1 i/o i2d/o4 98 d9 i/o i2d/o4 99 d2 i/o i2d/o4 100 d10 i/o i2d/o4 t3-1.18 1211 1. please refer to section 11.1 for details. 2. all dnu pins should not be connected. table 3-1: p in a ssignments (c ontinued ) pin no. signal name pin type i/o type 1
10 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 3.1 pin description table 3-2: h ost s ide i nterface symbol type 1 1. please refer to section 11.1 for detail pin name and functions a2 - a0 i 83,84,85 a[2:0] are used to select one of eight registers in the task file. d15 - d0 i/o 92,59,57, 54,52,100, 98,95,93, 58,56,53, 51,99,97, 94 data bus cs1fx#, cs3fx# i 66,67 cs1fx# is the chip select for the task file registers while cs3fx# is used to select the alternate status register and the device control register. csel i 61 this internally pulled-up signal is used to configure this device as a master or a slave. when this pin is grounded, this device is configured as a master. when the pin is open, this device is configured as a slave. the pin setting should remain the same from power-up to power-down. iord# i 70 this is an i/o read strobe generated by the host. this signal gates i/o data onto the bus from the chip. iowr# i 73 the i/o write strobe pulse is used to clock i/o data into the chip. iocs16# o 90 this output signal is asserted low when the device is indicating a word data transfer cycle. intrq o 65 this signal is the active high interrupt request to the host. pdiag# i/o 89 the pass diagnostic signal in the master/slave handshake protocol. dasp# i/o 63 the drive active/slave present sig nal in the master/slave handshake protocol. reset# i 81 this input pin is the active low hardware reset from the host. wp_pd# i 62 the wp_pd# pin can be used for either the write-protect mode or power-down mode, but only one mode is active at any time . the write-protect or power-down modes can be selected through the host command. the wr ite-protect mode is the factory default setting. for details, please refer to section 7.0 and section 10.2.1.18 t3-2.11 1211 table 3-3: f lash m edia i nterface symbol type pin name and functions fwp# o 25 this signal is an active low flash media chip write-protect. connect this pin to nand flash media write-protect pin. frdybsy# i 27 this signal is flash media chip ready/busy#. signal high is flash media ready signal. low is busy. fre# o 28 this signal is an active low flash media chip read. fwe# o 29 this signal is an active low flash media chip write. fcle o 30 this signal is an active high flash media chip command latch enable. fale o 31 this signal is an active high flash media chip address latch enable. fad7-fad0 i/o 43,42,41, 40,39,34, 33,32 these are flash media chip address/data bus pins. fce4#-fce0# o 49,48,47, 46,45 these are active low flash media chip enable pins. t3-3.7 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 11 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table 3-4: s erial c ommunication i nterface (sci) symbol type pin name and functions scid out o 1 this signal is sci interface data output. scid in i 2 this signal is sci interface data input. sciclk i 3 this signal is sci interface clock. scien# i 50 this signal is active low sci interface enable. t3-4.8 1211 table 3-5: e xternal c lock o ption symbol type pin name and functions intclken# i 20 internal clock enable pin. signal low enables an internal clock, high enables external clock source. extclk in i 36 external clock source input pin. extclk out o 37 external clock source output pin. t3-5.1 1211 table 3-6: m iscellaneous symbol type pin name and functions v ss (io) pwr 5,19,35,44,55,64,88,96 ground for i/o v ss (core) pwr 26,72 ground for core v dd (io) pwr 14,38 v dd (3.3v) v dd (core) pwr 23 v dd (3.3v) v ddq (io) pwr 60,78,91 v ddq (5v/3.3v) for host interface por# i 24 power on reset. active low, refer to section 8.0. t ie _up i 75, 86 pins need to be connected to v ddq. t ie _dn i 68,69,71,74,76,77, 79,80,82 pins need to be connected to v ss. dnu 4,6,7,8,9,10,11,12,13,15,16, 17,18,21,22,87 do not use, must be left unconnected. t3-6.11 1211
12 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 4.0 capacity specification table 4-1 shows the default capacity and specific setti ngs for heads, sectors and cylinders. users can change the default settings in the drive id table (see table 10-4) for customization. it should be noted that the total flash drive capacity should not exceed the total number of bytes listed in table 4-1. 4.1 functional specifications table 4-2 shows the performance and the maximum capacity supported by each controller. table 4-1: d efault ata f lash d rive s ettings capacity total bytes 1 1. c, h, and s can be user-configurable, but the total number of bytes should not exceed the default setting cylinders heads sectors 8 mb 8,028,160 245 2 32 16 mb 16,023,552 489 2 32 24 mb 24,051,712 367 4 32 32 mb 32,047,104 489 4 32 48 mb 48,037,888 733 4 32 64 mb 64,028,672 977 4 32 96 mb 96,075,776 733 8 32 128 mb 128,057,344 977 8 32 192 mb 2 2. only sst55ld017b and sst55ld017c support these capacities. 192,413,696 734 16 32 256 mb 2 256,901,120 980 16 32 384 mb 2 384,491,520 745 16 63 512 mb 2 512,483,328 993 16 63 640 mb 2 640,475,136 1241 16 63 t4-1.4 1211 table 4-2: f unctional s pecification of sst55ld017a/sst55ld017b/sst55ld017c functions sst55ld017a sst55ld017b sst55ld017c ata controller supported capacity 8mb to 128mb 8mb to 640mb, up to 2gb with external decoding 1 1. please refer to the application note, design consideration for high capacity flash drive 8mb to 640mb, up to 2gb with external decoding 1 ata controller performance- sustained write speed up to 1.2mb/sec up to 2.4mb/sec with 2-chip multi-tasking 2 up to 1.2mb/sec with 1-chip operation 2. the ata flash disk controller handles multiple flash operations. up to 4.0 mb/sec with 4-chip multi-tasking 2 up to 3.2 mb/sec with 3-chip multi-tasking 2 multi-tasking enabled no yes yes support 2gb through external decoding no yes yes t4-2.2 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 13 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 5.0 serial communication interface the serial communication interface is designed to enable the user to restart the self-initialization process and to customize the drive identification information. the serial communication interface consists of 4 signals: scid out , scid in , sciclk and scien#. please refer to the design consideration for ata flash disk co ntroller?s serial communication interface application note for fur- ther details. 6.0 external clock interface the external clock interface allows an external clock source to drive the ata flash disk controller. while the controller has an internal clock source, the external clock interface allows slowing of the clock operation to limit the peak cur- rent. please see the external clock operation for ata flash disk controller application note for further details. the external clock interface consists of three signals: intclken#, extclk in, and extclk out. the intclken# pin selects between external and internal clock sources for the ata flash disk controller. if this pin is pulled low before device power-up, then the internal clock source is selected; otherwise, the external clock source is selected. the extclk in and extclk out signals are the input and output clock signals, respectively. please see section 12.2 for the detailed circuit schematic. 7.0 configurable write-protect/power-down modes the wp_pd# pin can be used for either write-protect mode or power-down mode, but only one mode is active at any time. either mode can be selected through the host command, set-wp_pd#-mode, explained in section 10.2.1.18. once the mode is set with this command, the device will stay in the configured mode until the next time this com- mand is issued. power- off or reset will not chang e the configured mode. 7.1 write-protect mode when the device is configured in the write-protect mode , the wp_pd# pin offers extended data protection. this fea- ture can be either selected through a jumper or host logic to protect the stored data from inadvertent system writes or erases, and viruses. the write-protect feature protects the full address space of the data stored on the flash media. in the write-protect mode, the wp_pd# pin should be asserted prior to issuing the destructive commands: format- track, write-buffer, write-long-sector, write-multiple, write-sector(s), or write-verify. this will force the ata flash disk controller to reject any destructive commands from the ata interface. all destructive commands will return 51h in the status register and 04h in the error register signi fying an invalid command. all non-destructive commands will be executed normally. 7.2 power-down mode when the device is configured in the power-down mode, if the wp_pd# pin is asserted during a command, the ata disk controller completes the current command and returns to the standby mode immediately to save power. after- wards, the device will not accept any other commands. on ly a power-on reset or hardware reset will bring the device to normal operation with the wp_pd# pin de-asserted.
14 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 8.0 power-on and brown-ou t reset characteristics figure 8-1: p ower -o n and b rown -o ut r eset t iming 9.0 i/o transfer function the default operation for ata flash disk controller is 16-bit. ata flash disk controller, however, permits 8-bit data access if the host issues a set feature command to enable 8-bit mode. the following table defines the function of various operations. table 8-1: p ower -o n and b rown -o ut r eset t iming item symbol min max units por wait time t w 0.1 ms brown-out delay time t d 30 s t8-1.1 1211 table 9-1: i/o f unction function code cs3fx# cs1fx# a0-a2 iord# iowr# d15-d8 d7-d0 invalid mode v il v il x x x undefined undefined standby mode v ih v ih x x x high z high z task file write v ih v il 1-7h v ih v il x data in task file read v ih v il 1-7h v il v ih high z data out data register write v ih v il 0v ih v il in 1 1. if 8-bit data transfer mode is enabled. in 8-bit data transfer mode, high byte is undefined for data out. for data in, x can be v ih or v il , but no other value. in data register read v ih v il 0v il v ih out 1 out control register write v il v ih 6h v ih v il x control in alt status read v il v ih 6h v il v ih high z status out drive address v il v ih 7h v il v ih high z data out t9-1.2 1211 v dd t w 90% por# 1211 f01.8 t d 90%
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 15 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.0 software interface 10.1 ata flash disk controll er drive register set definitions and protocol 10.1.1 ata flash disk controller addressing the i/o decoding for an ata flash disk controller is as follows: 10.1.2 ata flash disk controller registers the following section describes the hardware registers used by the host software to issue commands to the ata flash disk controller. these registers are often collectively re ferred to as the ?task file? registers. the registers are only selectable through cs3fx#, cs1fx#, and a 2 -a 0 signals. please see table 10-1 for register addressing. 10.1.2.1 data register (read/write) (see table 10-1 for register addressing) this 16-bit register is used to transfer data blocks between the device data buffer and the host. it is also the register through which sector information is transferred on a format-track command. data transfer can be performed in pio mode. table 10-1: t ask f ile r egisters cs3fx# cs1fx# a2 a1 a0 registers iord# = 0 (iowr#=1) iowr# = 0 (iord#=1) 1 0 0 0 0 data (read) data (write) 1 0 0 0 1 error feature 1 0 0 1 0 sector count sector count 1 0 0 1 1 sector number (lba 7-0) sector number (lba 7-0) 1 0 1 0 0 cylinder low (lba 15-8) cylinder low (lba 15-8) 1 0 1 0 1 cylinder high (lba 23-16) cylinder high (lba 23-16) 1 0 1 1 0 drive/head drive/head 1 0 1 1 1 status command 0 1 1 1 0 alternate status device control 0 1 1 1 1 drive address reserved t10-1.6 1211
16 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.1.2.2 error register (read only) (see table 10-1 for register addressing) this register contains additional information about the source of an error when an error is indicated in bit 0 of the status register. the bits are defined as follows: symbol function bbk this bit is set when a bad block is detected. unc this bit is set when an uncorrectable error is encountered. idnf the requested sector id is in error or cannot be found. abrt this bit is set if the command has been abor ted because of an ata flash disk controller status condition: (not ready, write fault, etc.) or when an invalid command has been issued. amnf this bit is set in case of a general error. 10.1.2.3 feature register (write only) (see table 10-1 for register addressing) this register provides information re garding features of the ata flash disk controller that the host can utilize. 10.1.2.4 sector count register (see table 10-1 for register addressing) this register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the ata flash disk controller. if the value in this register is zero, a count of 256 sectors is specified. if the command was successful, this register is zero at command completion. if not successfully com- pleted, the register contains the number of sectors that need to be transferred in order to complete the request. 10.1.2.5 sector number (lba 7-0) register (see table 10-1 for register addressing) this register contains the starting sector number or bits 7-0 of the logical block address (lba) for any ata flash disk controller data access for the subsequent command. 10.1.2.6 cylinder low (lba 15-8) register (see table 10-1 for register addressing) this register contains the low order 8 bits of the starti ng cylinder address or bits 15-8 of then logical block address. 10.1.2.7 cylinder high (lba 23-16) register (see table 10-1 for register addressing) this register contains the high order bits of the starting cylinder address or bits 23-16 of the logical block address. d7 d6 d5 d4 d3 d2 d1 d0 reset value bbk unc 0 idnf 0 abrt 0 amnf 0000 0000b
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 17 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.1.2.8 drive/head (lba 27-24) register (see table 10-1 for register addressing) the drive/head register is used to select the drive and head. it is also used to select lba addressing instead of cylinder/head/sector addressing. the bits are defined as follows: symbol function lba lba is a flag to select either cylinder/head/se ctor (chs) or logical block address mode (lba). when lba=0, cylinder/head/sector mode is se lected. when lba=1, logical block address is selected. in logical block mode, the logical block address is interpreted as follows: lba7-lba0: sector number register d7-d0. lba15-lba8: cylinder low register d7-d0. lba23-lba16: cylinder high register d7-d0. lba27-lba24: drive/head register bits hs3-hs0. drv drv is the drive number. when drv=0 (master), master is selected. when drv=1(slave), slave is selected. hs3 when operating in the cylinder, head, sector mode, this is bit 3 of the head number. it is bit 27 in the logical block address mode. hs2 when operating in the cylinder, head, sector mode, this is bit 2 of the head number. it is bit 26 in the logical block address mode. hs1 when operating in the cylinder, head, sector mode, this is bit 1 of the head number. it is bit 25 in the logical block address mode. hs0 when operating in the cylinder, head, sector mode, this is bit 0 of the head number. it is bit 24 in the logical block address mode. d7 d6 d5 d4 d3 d2 d1 d0 reset value 1lba1 drv hs3 hs2 hs1 hs0 1010 0000b
18 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.1.2.9 status & alternate status registers (read only) (see table 10-1 for register addressing) these registers return the ata flash disk controller stat us when read by the host. reading the status register does clear a pending interrupt while reading the alternate status register does not. the meaning of the status bits are described as follows: symbol function busy the busy bit is set when the ata flash disk controller has access to the command buffer and registers and the host is locked out from accessing the command register and buffer. no other bits in this register are valid when this bit is set to a 1. rdy rdy indicates whether the device is capable of performing ata flash disk controller operations. this bit is cleared at power up and remains cleared until the ata flash disk controller is ready to accept a command. dwf this bit, if set, indicates a write fault has occurred. dsc this bit is set when the ata flash disk controller is ready. drq the data request is set when the ata flash disk controller requires that information be transferred either to or from the host through the data register. corr this bit is set when a correctable data error has been encountered and the data has been corrected. this condition does not terminate a multi-sector read operation. err this bit is set when the previous command has ended in some type of error. the bits in the error register contain additional information describing the error. it is recommended that media access commands (such as read-sectors and write-sectors) that end with an error condition should have the address of the first sector in error in the command block registers. 10.1.2.10 device control register (write only) (see table 10-1 for register addressing) this register is used to control the ata flash disk cont roller interrupt request and to issue a software reset. this register can be written to even if the device is busy. the bits are defined as follows: symbol function sw rst this bit is set to 1 in order to force the ata flash disk controller to perform a software reset operation. the chip remains in reset until this bit is reset to ?0.? -ien 0: the interrupt enable bit enables interrupts 1: interrupts from the ata flash disk controller are disabled this bit is set to 1 at power-on and reset. d7 d6 d5 d4 d3 d2 d1 d0 reset value busy rdy dwf dsc drq corr 0 err 1000 0000b d7 d6 d5 d4 d3 d2 d1 d0 reset value xxx x 1 sw rst -ien 0 0000 1010b
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 19 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.1.2.11 drive address register (read only) (see table 10-1 for register addressing) this register contains the inverted drive select and head select addresses of the currently selected drive. the bits in this register are as follows: symbol function -wtg this bit is 0 when a write operation is in progress, otherwise, it is 1. -hs3 this bit is the negation of bit 3 in the drive/head register. -hs2 this bit is the negation of bit 2 in the drive/head register. -hs1 this bit is the negation of bit 1 in the drive/head register. -hs0 this bit is the negation of bit 0 in the drive/head register. -ds1 this bit is 0 when drive 1 is active and selected. -ds0 this bit is 0 when drive 0 is active and selected. 10.1.2.12 command register (write only) (see table 10-1 for register addressing) this register contains the command code being sent to the drive. command execution begins immediately after this register is written. the executable commands, the command codes, and the necessary parameters for each command are listed in table 10-2. d7 d6 d5 d4 d3 d2 d1 d0 reset value x -wtg -hs3 -hs2 -hs1 -hs0 -ds1 -ds0 x111 1110b
20 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2 ata flash disk controll er command description this section defines the software requirements and the format of the commands the host sends to the ata flash disk controller. commands are issued to the ata flash disk contro ller by loading the required registers in the command block with the supplied parameters, and then writing the command code to the command register. the manner in which a command is accepted varies. there are three classes (see table 10-2) of command acceptance, all dependent on the host not issuing commands unless the ata flash disk controller is not busy (bsy=0). 10.2.1 ata flash disk controller command set table 10-2 summarizes the ata flash disk controller command set with the paragraphs that follow describing the individual commands and the task file for each. table 10-2: ata f lash d isk c ontroller c ommand s et class command code fr 1 1. fr - features register sc 2 2. sc - sector count register sn 3 3. sn - sector number register cy 4 4. cy - cylinder registers dh 5 5. dh - drive/head register lba 6 6. lba - logical block address mode supp orted (see command descriptions for use) 1 check-power-mode e5h or 98h - - - - d 8 - 1 execute-drive-diagnostic 90h - - - - d - 2 format-track 50h - y 7 7. y - the register contains a valid parameter for this command. -yy 8 8. for the drive/head register: y means both the ata fl ash disk controller and h ead parameters are used; d means only the ata flash disk controller parameter is valid and not the head parameter. y 1 identify-drive ech - - - - d - 1 idle e3h or 97h - y - - d - 1 idle-immediate e1h or 95h - - - - d - 1 initialize-drive-parameters 91h - y - - y - 1 read-buffer e4h - - - - d - 1 read-long-sector 22h or 23h - - y y y y 1 read-multiple c4h - y y y y y 1 read-sector(s) 20h or 21h - y y y y y 1 read-verify-sector(s) 40h or 41h - y y y y y 1 recalibrate 1xh - - - - d - 1seek 7xh - - yyy y 1 set-features efh y - - - d - 1 set-multiple-mode c6h - y - - d - 1 set-sleep-mode e6h or 99h - - - - d - 1 set-wp_pd#-mode 8bh y - - - d - 1 stand-by e2h or 96h - - - - d - 1 stand-by-immediate e0h or 94h - - - - d - 2write-buffer e8h - - - - d - 2 write-long-sector 32h or 33h - - y y y y 3 write-multiple c5h - y y y y y 2 write-sector(s) 30h or 31h - y y y y y 3write-verify 3ch -yyyy y t10-2.3 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 21 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.1 check-power-mode - 98h or e5h this command checks the power mode. because sst ata flash disk controller can recover from sleep in 200 ns, idle mode is never enabled. ata flash disk controller sets bsy, sets the sector count register to 00h, clea rs bsy and generates an interrupt. 10.2.1.2 execute-drive-diagnostic - 90h this command performs the internal diagnostic tests implemented by the ata flash disk controller. if the drive bit is ignored and the diagnostic comma nd is executed by both the master and the slave with the master responding with status for both devices. the diagnostic codes shown in table 10-3 are returned in the error register at the end of the command. bit ->76543210 command (7) 98h or e5h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit ->76543210 command (7) 90h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x table 10-3: d iagnostic c odes code error type 01h no error detected 02h formatter device error 03h sector buffer error 04h ecc circuitry error 05h controlling microprocessor error 8xh slave error t10-3.1 1211
22 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.3 format-track - 50h this command is accepted for host backward co mpatibility. the ata flash disk controller expects a sector buffer of data from the host to follow the command with the same protocol as the write-sector(s) command although the information in the buffer is not used by the ata flash disk controller. the use of this command is not recommended. 10.2.1.4 identify-drive - ech the identify-drive command enables the host to receive parameter information from the ata flash disk controller. this command has the same protocol as the read-sector(s) command. the parameter words in the buffer have the arrangement and meanings defined in table 10-4. all reserved bits or words are zero. table 10-4 gives the definition for each field in the identify-drive information. bit ->76543210 command (7) 50h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) x (lba 7-0) sec cnt (2) sector count feature (1) x bit ->76543210 command (7) ech c/d/h (6) xxxdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 23 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table 10-4: i dentify -d rive i nformation word address default value total bytes data field type information 0 044ah 2 general configuration bit-significant information 1 bbbb 1 2 default number of cylinders 2 0000h 2 reserved 3 bbbb 1 2 default number of heads 4 0000h 2 reserved 5 0000h 2 reserved 6 bbbb 1 2 default number of sectors per track 7-8 nnnnh 2 4 number of sectors per card (word 7 = msw, word 8 = lsw) 9 nnnnh 2 vendor unique 10-14 dddd 3 10 sst preset, unique id in ascii 15-19 eeee 4 10 user-programmable serial number in ascii 20 0002h 2 buffer type 21 nnnnh 2 buffer size in 512 byte increments 22 0004h 2 # of ecc bytes passed on read/write-long-sector commands 23-26 aaaa 5 8 firmware revision in ascii. bi g endian byte order in word 27-46 cccc 6 40 user definable model number 47 000nh 2 maximum number of sectors on read/write-multiple command 48 0000h 2 reserved 49 0200h 2 capabilities 50 0000h 2 reserved 51 0n00h 2 pio data transfer cycle timing mode 52 0000h 2 reserved (dma data transfer is not supported in ata fl ash disk controller) 53 000nh 2 translation parameters are valid 54 nnnnh 2 current numbers of cylinders 55 nnnnh 2 current numbers of heads 56 nnnnh 2 current sectors per track 57-58 nnnnh 4 current capacity in sectors (lbas) (word 57 = lsw, word 58 = msw) 59 010nh 2 multiple sector setting 60-61 nnnnh 4 total number of sectors addressable in lba mode 62-63 0000h 4 reserved (dma data transfer is not supported in ata fl ash disk controller) 64 00nnh 2 advanced pio transfer mode supported 65-66 0000h 4 reserved 67 nnnnh 2 minimum pio transfer cycle time without flow control 68 nnnnh 2 minimum pio transfer cycle time with iordy flow control 69-127 0000h 138 reserved 128-159 0000h 64 vendor unique bytes 160-255 0000h 192 reserved t10-4.10 1211 1. bbbb - default value set by controller. the selections could be user programmable. 2. n - calculated data based on product configuration 3. dddd - unique number of each device 4. eeee - the default value is 2020h 5. aaaa - any unique sst firmware revision 6. cccc - default value is ?xxxmb ata flash disk? where xxx is the flash drive capacity. the user has an option to change the model number during manufacturing.
24 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.4.1 general configuration this field informs the host that this is a non-magnetic, hard sectored, removable storage device with a transfer rate greater than 10 mbyte/sec and is not mfm encoded. 10.2.1.4.2 default number of cylinders this field contains the number of translated cylinde rs in the default translation mode. this value will be the same as the number of cylinders. 10.2.1.4.3 default number of heads this field contains the number of translated heads in the default translation mode. 10.2.1.4.4 default number of sectors per track this field contains the number of sectors per track in the default translation mode. 10.2.1.4.5 number of sectors this field contains the number of sectors per ata flash disk controller. this double word value is also the first invalid address in lba translation mode. 10.2.1.4.6 serial number the contents of this field are right justified and padded with spaces (20h). the first ten bytes are a sst preset, unique id. the second ten bytes are a user-programmable value with a default value of spaces. 10.2.1.4.7 buffer type this field defines the buffer capability: 0002h: a dual ported multi-sector buffer capable of simultaneous data transfers to or from the host and the ata flash disk controller. 10.2.1.4.8 buffer size this field defines the buffer capacity in 512 byte increments. sst?s ata flash disk controller has up to 2 sector data buffer for host interface. 10.2.1.4.9 ecc count this field defines the number of ecc bytes used on each sector in the read- and write-long-sector commands. 10.2.1.4.10 firmware revision this field contains the revision of the firmware for this product. 10.2.1.4.11 model number this field is reserved for the model number for this product. 10.2.1.4.12 read-/write-multiple sector count this field contains the maximum number of sectors that can be read or written per interrupt using the read-multiple or writ e-multiple commands. 10.2.1.4.13 capabilities bit 13: standby timer set to 0, forces sleep mode when host is inactive. bit 11: iordy support set to 0, indicates that this device may support iordy operation. bit 9: lba support set to 1, sst?s ata flash disk controllers support lba mode addressing. bit 8: dma support this bit is set to 0. dma mode is not supported.
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 25 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.4.14 pio data transfer cycle timing mode this field defines the mode for pio data transfer. ata flash disk controller supports up to pio mode-4. 10.2.1.4.15 translation parameters valid if bit 0 is 1, it indicates that words 54 to 58 are valid and reflect the current number of cylinders, heads and sectors. if bit 1 is 1, it indicates that words 64 to 70 are valid to support pio mode-3 and 4. 10.2.1.4.16 current number of cylinders, heads, sectors/track these fields contains the current number of user addressable cylinders, heads, and sectors/track in the current translation mode. 10.2.1.4.17 current capacity this field contains the product of the cu rrent cylinders times heads times sectors. 10.2.1.4.18 multiple sector setting this field contains a validity flag in the odd byte and the current number of sectors that can be transferred per interrupt for r/w multiple in the even byte. the odd byte is always 01h which indicates that the even byte is always valid. the even byte value depends on the value set by the set multiple command. the even byte of this word by default contains a 00h which indicates that r/w multiple commands are not valid. 10.2.1.4.19 total sectors addressable in lba mode this field contains the number of sectors addressable for the ata flash disk controller in lba mode only. 10.2.1.4.20 advanced pio data transfer mode ata flash disk controller supports up to pio mode-4. 10.2.1.4.21 minimum pio transfer cycle time without flow control the ata flash disk controller?s minimum cycle time is 120 ns. 10.2.1.4.22 minimum pio transfer cycle time with iordy the ata flash disk controller?s minimum cycle time is 120 ns, e.g., pio mode-4. 10.2.1.5 idle - 97h or e3h this command causes the ata fl ash disk controller to set bsy, en ter the idle mode, clear bsy and generate an interrupt. if the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automa tic power-down mode is enabled. if the sector count is zero, the automatic power-down mode is also enabled, the timer count is set to 3, with each count being 5 ms. note that this time base (5 msec) is different from the ata specification. bit ->76543210 command (7) 97h or e3h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) timer count (5 msec increments) feature (1) x
26 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.6 idle-immediate - 95h or e1h this command causes the ata fl ash disk controller to set bsy, en ter the idle mode, clear bsy and generate an interrupt. 10.2.1.7 initialize-drive-parameters - 91h this command enables the host to set the number of sectors per track and the number of heads per cylinder. only the sector count and the drive/head registers are used by this command. 10.2.1.8 read-buffer - e4h the read-buffer command enables the host to read the current contents of the ata flash disk controller?s sector buffer. this command has the same protocol as the read-sector(s) command bit ->76543210 command (7) 95h or e1h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit ->76543210 command (7) 91h c/d/h (6) x 0 x drive max head (no. of heads-1) cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) number of sectors feature (1) x bit ->76543210 command (7) e4h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 27 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.9 read-multiple - c4h note: the current revision of the sst ata flash disk controller can sup port up to a block count of 1 as indicated in the identify-dri ve command information. the read-multiple command is similar to the read-sector(s) command. interrupts are not generated on every sector, but on the transfer of a block which contains the number of sectors defined by a set multiple command. command execution is identical to the read-sectors operation except that the number of sectors defined by a set multiple command are transferred wi thout intervening interrup ts. drq qualification of the transfer is required only at the start of the data block, not on each sector. the block count of sectors to be transferred without intervening interrupts is programmed by the set- multiple-mode command, which must be executed prior to the read-multiple command. when the read-multiple command is issued, the sector count register contains the number of sectors (not the number of blocks or the block count) requested. if the number of requested sectors is not evenly divisible by the block count, as many full blocks as possible are transferred, followed by a final, partial block transfer. the partial block transfer is for n sectors, where n = remainder (sector count/block count). if the read-multiple command is attempted before the set-multiple-mode command has been executed or when read-multiple commands are disabled, the read-multiple operation is rejected with an aborted command error. disk errors encountered during read-multiple commands are posted at the beginning of the block or partial block transfer, but drq is still set and the data transfer will take place as it normally would, including transfer of corrupted data, if any. interrupts are generated when drq is set at the beginning of each block or partial block. the error reporting is the same as that on a read-sector(s) command. this command reads from 1 to 256 sectors as specified in the sector count register. a sector count of 0 requests 256 sectors. the transfer begins at the sector specified in the sector number register. at command completion, the command block registers contain the cylinder, head and sector number of the last sector read. if an error occurs, the read terminates at the sector where the error occurred. the command block registers contain the cylinder, head and sector number of the sector where the error occurred. the flawed data is pending in the sector buffer. subsequent blocks or partial blocks are transferred only if the error was a correctable data error. all other errors cause the command to stop after transfer of the block which contained the error. bit ->76543210 command (7) c4h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x
28 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.10 read-long-sector - 22h or 23h the read-long-sector command performs similarly to the read-sector(s) command except that it returns 516 bytes of data instead of 512 bytes. during a read-long-sector command, the ata flash disk controller does not check the ecc bytes to determine if there has been a data error. only single- sector read-long-sector operations are supported. the transfer consists of 512 bytes of data transferred in word-mode followed by 4 bytes of ecc data transferred in byte-mode. this command has the same protocol as the read-sector(s) command. use of this command is not recommended. 10.2.1.11 read-sector(s) - 20h or 21h this command reads from 1 to 256 sectors as specified in the sector count register. a sector count of 0 requests 256 sectors. the transfer begins at the sector specified in the sector number register. when this command is issued and after each sector of data (except the last one) has been read by the host, the ata flash disk controller sets bsy, puts the sector of data in the buffer, sets drq, clears bsy, and generates an interrupt. the host then reads the 512 bytes of data from the buffer. at command completion, the command block registers contain the cylinder, head and sector number of the last sector read. if an error occurs, the read terminates at the sector where the error occurred. the command block registers contain the cylinder, head, and sector number of the sector where the error occurred. the flawed data is pending in the sector buffer. bit ->76543210 command (7) 22h or 23h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) x feature (1) x bit ->76543210 command (7) 20h or 21h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 29 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.12 read-verify-sector(s) - 40h or 41h this command is identical to the read-sectors command, except that drq is never set and no data is transferred to the host. when the command is accepted, the ata flash disk controller sets bsy. when the requested sectors have been verified, the ata flash disk controller clears bsy and generates an interrupt. upon command completion, the command block registers contain the cylinder, head, and sector number of the last sector verified. if an error occurs, the verify terminates at the sector where the error occurs. the command block registers contain the cylinder, head and sector number of the sector where the error occurred. the sector count register contains the number of sectors not yet verified. 10.2.1.13 recalibrate - 1xh this command is effectively a nop command to the ata flash disk controller and is provided for compatibility purposes. 10.2.1.14 seek - 7xh this command is effectively a nop command to the ata flash disk controller although it does perform a range check of cylinder and head or lba address and returns an error if the address is out of range. bit ->76543210 command (7) 40h or 41h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x bit ->76543210 command (7) 1xh c/d/h (6) 1lba1drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit ->76543210 command (7) 7xh c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) x (lba 7-0) sec cnt (2) x feature (1) x
30 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.15 set-features - efh this command is used by the host to establish or select certain features. table 10-5 defines all features that are supported. features 01h and 81h are used to enable and clear 8-bit data transfer mode. if the 01h feature command is issued all data transfers will occur on the low order d7-d0 data bus and the iocs16# signal will not be asserted for data register accesses. features 55h and bbh are the default features for t he ata flash disk controller; thus, the host does not have to issue this command with these features unless it is necessary for compatibility reasons. features 66h and cch can be used to enable and disable whether the power on reset (por) defaults will be set when a software reset occurs. bit ->76543210 command (7) efh c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) feature table 10-5: f eatures s upported feature operation 01h enable 8-bit data transfers. 03h set transfer mode based on value in sector count register. table 10-6 defines the values. 55h disable read look ahead. 66h disable power on reset (por) establishment of defaults at software reset. 69h nop - accepted for backward compatibility. 81h disable 8-bit data transfer. 96h nop - accepted for backward compatibility. 97h accepted for backward compatibility. us e of this feature is not recommended. 9ah nop - accepted for compatibility. bbh 4 bytes of data apply on read/write-long-sector commands. cch enable power on reset (por) establishment of defaults at software reset. t10-5.1 1211 table 10-6: t ransfer m ode v alues mode bits [7:3] bits [2:0] pio default mode 00000b 000b pio default mode, disable iordy 00000b 001b pio flow control transfer mode 00001b mode 1 1. mode = transfer mode number, all other values are not valid reserved other n/a t10-6.1 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 31 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.16 set-multiple-mode - c6h this command enables the ata flash disk controller to perform read and write-multiple operations and establishes the block count for these commands. the sector count register is loaded with the number of sectors per block. upon rece ipt of the command, t he ata flash disk contro ller sets bsy to 1 and checks the sector count register. if the sector count register contains a valid value (see section 10.2.1.4.12 for details) and the block count is supported, the value is loaded for all s ubsequent read-multiple and write-multiple commands and execution of those commands is enabled. if a block count is not supported, an aborted command error is posted, and read-multiple and write-multiple commands are disabled. if the sector count register contains 0 when the command is issued, read and write-multiple commands are disabled. at power on, or after a hardware or (unless disabled by a set feature command) software reset, the default mode is read and write-multiple disabled. 10.2.1.17 set-sleep-mode - 99h or e6h this command causes the ata flash disk cont roller to set bsy, enter th e sleep mode, clear bsy and generate an interrupt. recovery from sleep mode is accomplished by simply issuing another command (a reset is permitted but not required). sleep mode is also entered when internal timers expire so the host does not need to issue this command except when it wishes to enter sleep mode immediately. the default value for the timer is 15 milliseconds. bit ->76543210 command (7) c6h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) sector count feature (1) x bit ->76543210 command (7) 99h or e6h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x
32 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.18 set-wp_pd#-mode - 8bh this command configures the wp_pd# pin for either the write-protect mode or the power-down mode. when the host sends this command to the device with the value aah in the feature register, the wp_pd# pin is configured for the write-protect mode described in section 7.1. the write-protect mode is the factory default setting. when the host sends this command to the device with the value 55h in the feature register, wp_pd# is configured for the power-down mode. all values in the c/d/h register, the cylinder low register, the cylinder high register, the sector number register, the sector count register, and the feature register need to match the values shown above, otherwise, the command will be treated as an in valid command. once the mode is set with this co mmand, the device will stay in the c onfigured mode until the next time this command is issued. power-off or re set will not change the configured mode. 10.2.1.19 standby - 96h or e2h this command causes the ata flash disk controller to set bsy, enter the sleep mode (which corresponds to the ata ?standby? mode), clear bsy and return the interrupt immediately. recovery from sleep mode is accomplished by simply issuing another command (a reset is not required). bit ->76543210 command (7) 8bh c/d/h (6) xxxdrive x cyl high (5) 6eh cyl low (4) 44h sec num (3) 72h sec cnt (2) 50h feature (1) 55h or aah bit ->76543210 command (7) 96h or e2h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 33 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.20 standby-immediate - 94h or e0h this command causes the ata flash disk controller to set bsy, enter the sleep mode (which corresponds to the ata ?standby? mode), clear bsy and return the interrupt immediately. recovery from sleep mode is accomplished by simply issuing another command (a reset is not required). 10.2.1.21 write-buffer - e8h the write-buffer command enables the host to overwrite contents of the ata flash disk controller?s sector buffer with any data pattern desired. this command has the same protocol as the write- sector(s) command and transfers 512 bytes. 10.2.1.22 write-long-sector - 32h or 33h this command is similar to the write-sector(s) command except that it writes 516 bytes instead of 512 bytes. only single sector write-long-sector operations are supported. the transfer consists of 512 bytes of data transferred in word-mode followed by 4 bytes of ecc transferred in byte-mode. because of the unique nature of the solid-state ata flash di sk controller, the 4 bytes of ecc transferred by the host may be used by the ata flash disk controller. the ata flash disk controller may discard these 4 bytes and write the sector with valid ecc data. this command has the same protocol as the write- sector(s) command. use of this command is not recommended. bit ->76543210 command (7) 94h or e0h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit ->76543210 command (7) e8h c/d/h (6) xdrive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x bit ->76543210 command (7) 32h or 33h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) x feature (1) x
34 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.23 write-multiple - c5h note: the current revision of the sst ata flash disk controller can sup port up to a block count of 1 as indicated in the identify-dri ve command information. this command is similar to the write-sectors command. the ata fl ash disk controller sets bsy within 400 ns of accepting the command. interrupts are not presented on each sector but on the transfer of a block which contains the number of sectors defined by set multiple. command execution is identical to the write-sectors operation except that the number of sectors defined by the set multiple command is transferred without intervening interrupts. drq qualification of the transfer is required only at the start of the data block, not on each sector. the block count of sectors to be transferred without intervening interrupts is programmed by the set- multiple-mode command, which must be executed prior to the write-multiple command. when the write-multiple command is issued, the sector count register contains the number of sectors (not the number of blocks or the block count) requested. if the number of requested sectors is not evenly divisible by the sector/block, as many full blocks as possible are transferred, followed by a final, partial block transfer. the partial block transfer is for n sectors, where: n = remainder (sector count/block). if the write-multiple command is attempted before the set-multiple-mode command has been executed or when write-multiple commands ar e disabled, the write-multiple operation will be rejected with an aborted command error. errors encountered during write-multiple commands are posted after the attempted writes of the block or partial block transferred. the write command ends with the sector in error, even if it is in the middle of a block. subsequent blocks are not transferred in the event of an error. interrupts are generated when drq is set at the beginning of each block or partial block. the command block registers contain the cylinder, head and sector number of the sector where the error occurred and the sector count register contains the residual number of sectors that need to be transferred for successful completion of the command e.g. each block has 4 sectors, a request for 8 sectors is issued and an error occurs on the third sector. the sector count register contains 6 and the address is that of the third sector. bit ->76543210 command (7) c5h c/d/h (6) xlbaxdrive head cyl high (5) cylinder high cyl low (4) cylinder low sec num (3) sector number sec cnt (2) sector count feature (1) x
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 35 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.1.24 write-sector(s) - 30h or 31h this command writes from 1 to 256 sectors as specified in the sector count register. a sector count of zero requests 256 sectors. the transfer begins at the sector specified in the sector number register. when this command is accepted, the ata flash disk controller sets bsy, then sets drq and clears bsy, then waits for the host to fill th e sector buffer with the data to be written. no interrupt is generated to start the first host transfer operation. no data should be transfe rred by the host until bsy has been cleared by the host. for multiple sectors, after the fi rst sector of data is in the buffer, bsy will be set and drq will be cleared. after the next buffer is ready for data, bsy is clea red, drq is set and an interrupt is generated. when the final sector of data is transferred, bsy is set and drq is cleared. it will remain in this state until the command is co mpleted at which time bsy is cleare d and an interrupt is generated. if an error occurs during a write of more than one sector, writing terminates at the sector where the error occurs. the command block registers contain the cylinder, head and sector number of the sector where the error occurred. the host may then read the command block to determine what error has occurred, and on which sector. 10.2.1.25 write-verify - 3ch this command is similar to the write-sector(s) command, except each sector is verified immediately after being written. this command has the same protocol as the write-sector(s) command. bit ->76543210 command (7) 30h or 31h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x bit ->76543210 command (7) 3ch c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x
36 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 10.2.2 error posting the following table summarizes the valid status and error value for all the ata flash disk controller command set. table 10-7: e rror and s tatus r egister command error register status register bbk unc idnf abrt amnf rdy dwf dsc corr err check-power-mode v v v v v execute-drive-diagnostic 1 1. see table 10-3 v = valid on this command vvv format-track vvvvvv v identify-drive v v v v v idle v vvv v idle-immediate v v v v v initialize-drive-parameters v v v read-buffer v v v v v read-multiple vvvvvvvvvv read-long-sector v vvvvvv v read-sector(s) vvvvvvvvvv read-verify-sector(s) vvvvvvvvvv recalibrate v vvv v seek vv vvv v set-features v v v v v set-multiple-mode v v v v v set-sleep-mode v v v v v set-wp_pd#-mode vvvv standby v v v v v standby-immediate v v v v v write-buffer v v v v v write-long-sector v vvvvvv v write-multiple v vvvvvv v write-sector(s) v vvvvvv v write-verify v vvvvvv v invalid-command-code v v v v v t10-7.4 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 37 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.0 electrical specifications absolute maximum stress ratings (applied conditions greater than t hose listed under ?absolute maximum stress ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these conditions or conditions greater t han those defined in the operational sections of this data sheet is not implied. exposu re to absolute maximum stress rating co nditions may affect device reliability.) temperature under bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55c to +125c storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65c to +150c d.c. voltage on any pin to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5v to v dd +0.5v transient voltage (<20 ns) on any pin to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0v to v dd +2.0v package power dissipation capability (ta = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0w through hole lead soldering temperature (10 seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300c surface mount lead soldering temperature (3 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240c output short circuit current 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ma 1. outputs shorted for no more than one second. no more than one output shorted at a time. table 11-1: a bsolute m aximum p ower p in s tress r atings parameter symbol conditions input power v ddq v dd -0.3v min to 6.5v max -0.3v min to 4.0v max voltage on any flash media interface pin with respect to v ss -0.5v min to v dd + 0.5v max voltage on all other pins with respect to v ss -0.5v min to v ddq + 0.5v max t11-1.3 1211 o perating r ange range ambient temperature v dd v ddq commercial 0c to +70c 3.135 -3.465v 4.5-5.5v; 3.135-3.465v industrial -40c to +85c 3.135 -3.465v 4.75-5.25v; 3.135-3.465v ac c onditions of t est input rise/fall time . . . . . . . . . . . . . . 10 ns output load . . . . . . . . . . . . . . . . . . . . c l = 100 pf see figure 11-1 note: all ac specifications are guaranteed by design. table 11-2: r ecommended s ystem p ower - up t iming symbol parameter typical maximum units t pu-initial first-time power-up/reset to ready 0.5 1.5 sec/mb t pu-ready 1 1. this parameter is measured only for init ial qualification and after a design or proc ess change that could affect this paramet er. host power-up/reset to ready operation 200 500 ms t pu-write 1 host power-up/reset to write operation 200 500 ms t11-2.5 1211
38 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.1 dc characteristics in the table below, x refers to the characteristics described in section 11.1.1. for example, i1u indicates a pull up resistor with a type 1 input characteristic. table 11-3: c apacitance (ta = 25c, f=1 mhz, other pins open) parameter description test condition maximum units c i/o 1 i/o pin capacitance v i/o = 0v 15 pf c in 1 input capacitance v in = 0v 9 pf t11-3.1 1211 1. this parameter is measured only for init ial qualification and after a design or proc ess change that could affect this paramet er. table 11-4: r eliability c haracteristics symbol parameter minimum spec ification units test method i lt h 1 1. this parameter is measured only for init ial qualification and after a design or proc ess change that could affect this paramet er. latch up 100 + i dd ma jedec standard 78 t11-4.1 1211 table 11-5: i nput c haracteristics , v dd = v ddq = 3.135-3.465v type parameter symbol conditions min max units ixz input leakage current il v ih = v ddq max; v il = v ss v dd = v ddq = v dd max -10 10 a i5u pull up resistor rpu2 v ddq = v ddq min; v dd = v dd min 50 500 kohm i1u-i4u pull up resistor rpu1 v ddq = v ddq min; v dd = v dd min 50 1500 kohm i2d pull down resistor rpd1 v ddq = v ddq min; v dd = v dd min 50 1500 kohm t11-5.7 1211 table 11-6: i nput c haracteristics , v ddq = 4.5-5.5v, v dd = 3.135-3.465v type parameter symbol conditions min max units i1u-i4u pull up resistor rpu1 v ddq = v ddq min; v dd = v dd min 50 700 kohm i2d pull down resistor rpd1 v ddq = v ddq min; v dd = v dd min 50 700 kohm t11-6.9 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 39 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.1.1 input characteristics table 11-7: i nput v oltage c haracteristics (ta = 0c to +70c), v dd = v ddq = 3.135-3.465v type 1 1. i1-i4 are for host side interface only. i5-i6 are for flash media interface only. parameter symbol min max units conditions i1 input voltage cmos v ih v ddq -1.3 volts v ddq =v ddq max v il v ddq -2.5 v ddq =v ddq min i2 input voltage cmos v ih v ddq -1.3 volts v ddq =v ddq max v il v ddq -2.5 v ddq =v ddq min i3 input voltage cmos schmitt trigger v t+ v ddq -1.3 volts v ddq =v ddq max v t- v ddq -2.7 v ddq =v ddq min i4 input voltage cmos schmitt trigger v t+ v ddq -1.3 volts v ddq =v ddq max v t- v ddq -2.5 v ddq =v ddq min i5 input voltage cmos v ih v dd -1.2 volts v dd =v dd max v il v dd -2.5 v dd =v dd min i6 input voltage cmos schmitt trigger v t+ v dd -0.6 volts v dd =v dd max v t- v dd -2.55 v dd =v dd min t11-7.2 1211 table 11-8: i nput v oltage c haracteristics (ta = 0c to +70c), v ddq = 4.5-5.5v, v dd = 3.135-3.465v type 1 1. i1-i4 are for host side interface only. i5-i6 are for flash media interface only. parameter symbol min max units conditions i1 input voltage cmos v ih v ddq -2.7 volts v ddq =v ddq max v il v ddq -4.2 v ddq =v ddq min i2 input voltage cmos v ih v ddq -2.3 volts v ddq =v ddq max v il v ddq -4.2 v ddq =v ddq min i3 input voltage cmos schmitt trigger v t+ v ddq -2.7 volts v ddq =v ddq max v t- v ddq -4.2 v ddq =v ddq min i4 input voltage cmos schmitt trigger v t+ v ddq -2.7 volts v ddq =v ddq max v t- v ddq -4.2 v ddq =v ddq min i5 input voltage cmos v ih v dd -1.2 volts v dd =v dd max v il v dd -2.5 v dd =v dd min i6 input voltage cmos schmitt trigger v t+ v dd -0.6 volts v dd =v dd max v t- v dd -2.55 v dd =v dd min t11-8.2 1211
40 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table 11-9: i nput v oltage c haracteristics (ta = -40c to +85c), v dd = v ddq = 3.135-3.465v type 1 parameter symbol min max units conditions i1 input voltage cmos v ih v ddq -1.3 volts v ddq =v ddq max v il v ddq -2.5 v ddq =v ddq min i2 input voltage cmos v ih v ddq -1.3 volts v ddq =v ddq max v il v ddq -2.5 v ddq =v ddq min i3 input voltage cmos schmitt trigger v t+ v ddq -1.3 volts v ddq =v ddq max v t- v ddq -2.7 v ddq =v ddq min i4 input voltage cmos schmitt trigger v t+ v ddq -1.3 volts v ddq =v ddq max v t- v ddq -2.5 v ddq =v ddq min i5 input voltage cmos v ih v dd -1.2 volts v dd =v dd max v il v dd -2.5 v dd =v dd min i6 input voltage cmos schmitt trigger v t+ v dd -0.6 volts v dd =v dd max v t- v dd -2.55 v dd =v dd min t11-9.4 1211 1. i1-i4 are for host side interface only. i5-i6 are for flash media interface only. table 11-10: i nput v oltage c haracteristics (ta = -40c to +85c), v ddq = 4.5-5.5v, v dd = 3.135-3.465v type 1 1. i1-i4 are for host side interface only. i5-i6 are for flash media interface only. parameter symbol min max units conditions i1 input voltage cmos v ih v ddq -2.7 volts v ddq =v ddq max v il v ddq -4.2 v ddq =v ddq min i2 input voltage cmos v ih v ddq -2.3 volts v ddq =v ddq max v il v ddq -4.2 v ddq =v ddq min i3 input voltage cmos schmitt trigger v t+ v ddq -2.7 volts v ddq =v ddq max v t- v ddq -4.2 v ddq =v ddq min i4 input voltage cmos schmitt trigger v t+ v ddq -2.7 volts v ddq =v ddq max v t- v ddq -4.2 v ddq =v ddq min i5 input voltage cmos v ih v dd -1.2 volts v dd =v dd max v il v dd -2.5 v dd =v dd min i6 input voltage cmos schmitt trigger v t+ v dd -0.6 volts v dd =v dd max v t- v dd -2.55 v dd =v dd min t11-10.4 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 41 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.1.2 output characteristics table 11-11: o utput v oltage c haracteristics (ta = 0c to +70c), v dd = v ddq = 3.135-3.465v type 1 1. o2 and o4 are for host side interface only. o1 and o3 are for flas h media interface only. parameter symbol min max units conditions o1 output voltage v oh v dd -0.9 volts i oh =-1.3 ma, v dd =v ddq =v ddq min v ol v dd -3.0 i ol =1.3 ma, v dd =v ddq =v ddq min o2 output voltage v oh v ddq -1.0 volts i oh =-2.5 ma, v dd =v ddq =v ddq min v ol v ddq -2.9 i ol =2.5 ma, v dd =v ddq =v ddq min o3 output voltage v oh v dd -0.9 volts i oh =-4 ma, v dd =v ddq =v ddq min v ol v dd -3.0 i ol =4 ma, v dd =v ddq =v ddq min o4 output voltage v oh v ddq -1.0 volts i oh =-5 ma, v dd =v ddq =v ddq min v ol v ddq -2.9 i ol =5 ma, v dd =v ddq =v ddq min t11-11.4 1211 table 11-12: o utput v oltage c haracteristics (ta = 0c to +70c), v ddq = 4.5-5.5v, v dd = 3.135-3.465v type 1 1. o2 and o4 are for host side interface only. o1 and o3 are for flas h media interface only. parameter symbol min max units conditions o1 output voltage v oh v dd -0.9 volts i oh =-1.3 ma, v dd =v dd min, v ddq =v ddq min v ol v dd -3.0 i ol =1.3 ma, v dd =v dd min, v ddq =v ddq min o2 output voltage v oh v ddq -1.3 volts i oh =-4 ma, v dd =v dd min; v ddq =v ddq min v ol v ddq -4.6 i ol =4 ma, v dd =v dd min, v ddq =v ddq min o3 output voltage v oh v dd -0.9 volts i oh =-4 ma, v dd =v dd min, v ddq =v ddq min v ol v dd -3.0 i ol =4 ma, v dd =v dd min, v ddq =v ddq min o4 output voltage v oh v ddq -1.3 volts i oh =-8 ma, v dd =v dd min; v ddq =v ddq min v ol v ddq -4.6 i ol =8 ma, v dd =v dd min, v ddq =v ddq min t11-12.2 1211
42 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 table 11-13: o utput v oltage c haracteristics (ta = -40c to +85c), v dd = v ddq = 3.135-3.465v type 1 parameter symbol min max units conditions o1 output voltage v oh v dd -0.9 volts i oh =-1.3 ma, v dd =v ddq =v ddq min v ol v dd -3.0 i ol =1.3 ma, v dd =v ddq =v ddq min o2 output voltage v oh v ddq -1.0 volts i oh =-2 ma, v dd =v ddq =v ddq min v ol v ddq -2.9 i ol =2 ma, v dd =v ddq =v ddq min o3 output voltage v oh v dd -0.9 volts i oh =-4 ma, v dd =v ddq =v ddq min v ol v dd -3.0 i ol =4 ma, v dd =v ddq =v ddq min o4 output voltage v oh v ddq -1.0 volts i oh =-4 ma, v dd =v ddq =v ddq min v ol v ddq -2.9 i ol =4 ma, v dd =v ddq =v ddq min t11-13.9 1211 1. o2 and o4 are for host side interface only. o1 and o3 are for flas h media interface only. table 11-14: o utput v oltage c haracteristics (ta = -40c to +85c), v ddq = 4.5-5.5v, v dd = 3.135-3.465v type 1 1. o2 and o4 are for host side interface only. o1 and o3 are for flas h media interface only. parameter symbol min max units conditions o1 output voltage v oh v dd -0.9 volts i oh =-1.3 ma, v dd =v dd min, v ddq =v ddq min v ol v dd -3.0 i ol =1.3 ma, v dd =v dd min, v ddq =v ddq min o2 output voltage v oh v ddq -1.3 volts i oh =-3 ma, v dd =v dd min; v ddq =v ddq min v ol v ddq -4.6 i ol =3 ma, v dd =v dd min, v ddq =v ddq min o3 output voltage v oh v dd -0.9 volts i oh =-4 ma, v dd =v dd min, v ddq =v ddq min v ol v dd -3.0 i ol =4 ma, v dd =v dd min, v ddq =v ddq min o4 output voltage v oh v ddq -1.3 volts i oh =-6 ma, v dd =v dd min; v ddq =v ddq min v ol v ddq -4.6 i ol =6 ma, v dd =v dd min, v ddq =v ddq min t11-14.7 1211 table 11-15: dc c haracteristics, v ddq = 4.5-5.5v, v dd = 3.135-3.465v symbol parameter typ max units conditions i dd active 1,2 1. sequential data transfer for 1 sector read data from host interface and write data to media. 2. this parameter is measured only for init ial qualification and after a design or proc ess change that could affect this paramet er. power supply current (ta = -40c to +85c) 35 50 ma v dd =v dd max; v ddq =v ddq max i sp sleep/standby/idle current (ta = 0c to +70c) 50 75 a v dd =v dd max; v ddq =v ddq max i sp sleep/standby/idle current (ta = -40c to +85c) 75 200 a v dd =v dd max; v ddq =v ddq max t11-15.7 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 43 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.2 ac characteristics figure 11-1: ac i nput /o utput r eference w aveforms 11.2.1 host side interface i/o i nput (read) timing specification note: the maximum load on iocs16# is 1 lsttl with 50pf total load. all ac specifications are guaranteed by design. figure 11-2: h ost s ide i nterface i/o r ead t iming d iagram table 11-16: h ost s ide i nterface i/o r ead t iming item symbol min max units data setup before iord# tsu(iord) 20 - ns data hold following iord# th(iord) 5 - ns iord# width time tw(iord) 70 - ns address setup before iord# tsua(iord) 25 - ns address hold following iord# tha(iord) 10 - ns iocs16# delay falling from address tdfiocs16(adr) - 20 ns iocs16# delay rising from address tdriocs16(adr) - 20 ns t11-16.6 1211 1211 f02.1 reference points output input v it v iht v ilt v ot ac test inputs are driven at v iht (0.9 v dd ) for a logic ?1? and v ilt (0.1 v dd ) for a logic ?0?. measurement reference points for inputs and outputs are v it (0.5 v dd ) and v ot (0.5 v dd ). input rise and fall times (10% ? 90%) are <10 ns. note: v it - v input te s t v ot - v output te s t v iht - v input high test v ilt - v input low test 1211 f03.5 tdriocs16(adr) tdfiocs16(adr) tha(iord) th(iord) tsua(iord) tsu (iord) tw(iord) valid address 1 iord# iocs16# d 15 -d 0 d out 1. valid address consists of signals cs1fx#, cs3fx# and a 2 -a 0 .
44 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.2.2 host side interface i/o output (write) timing specification note: the maximum load on iocs16# is 1 lsttl with 50pf total load. all ac specifications are guaranteed by design. figure 11-3: h ost s ide i nterface i/o w rite t iming d iagram table 11-17: h ost s ide i nterface i/o w rite t iming s pecification item symbol min max units data setup before iowr# tsu(iowr) 20 - ns data hold following iowr# th(iowr) 10 - ns iowr# width time tw(iowr) 70 - ns address setup before iowr# tsua(iowr) 25 - ns address hold following iowr# tha(iowr) 10 - ns iocs16# delay falling from address tdfiocs16(adr) - 20 ns iocs16# delay rising from address tdriocs16(adr) - 20 ns t11-17.5 1211 1211 f04.5 tdriocs16(adr) tdfiocs16(adr) tha(iowr) th(iowr) tsu(iowr) d in valid tsua(iowr) tw(iowr) valid address 1 iowr# iocs16# d 15 -d 0 1. valid address consists of signals cs1fx#, cs3fx# and a 2 -a 0 .
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 45 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 11.2.3 media side interfac e i/o timing specifications note: all ac specifications are guaranteed by design. table 11-18: sst55ld017a/b/c t iming p arameters item symbol min max units fcle setup time t cls 30 - ns fcle hold time t clh 30 - ns fce# setup time t cs 30 - ns fce# hold time for command/data write cycle t ch 30 - ns fce# hold time for sequential read last cycle t chr -30 ns fwe# pulse width t wp 30 - ns fwe# high hold time t wh 30 - ns write cycle time t wc 60 - ns fale setup time t als 30 - ns fale hold time t alh 30 - ns fad[7:0] setup time t ds 25 - ns fad[7:0] hold time t dh 25 - ns fre# pulse width t rp 30 - ns ready to fre# low t rr 30 - ns fre# data setup access time t rea 20 - ns read cycle time t rc 60 - ns fre# high hold time t reh 30 - ns fre# high to data hi-z t rhz 5- ns t11-18.9 1211
46 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 figure 11-4: m edia c ommand l atch c ycle figure 11-5: m edia a ddress l atch c ycle fcle fce# fwe# fale fad[7:0] command t ds t dh t alh t als t wp t clh t cls t cs t ch 1211 f05.2 fce# fwe# fale fad[7:0] t cs t wc 1211 f06.1 a 0 -a 7 a 9 -a 16 a 17 -a 23 t ds t dh t als t alh t wp t wp t wp t wh t wh t ds t ds t dh t dh t wc fcle
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 47 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 figure 11-6: m edia d ata l oading l atch c ycle figure 11-7: m edia d ata r ead c ycle fcle fce# fale fwe# fad[7:0] 1211 f07.1 t ds t dh t wp t wp t wp t wh t ds t ds t dh t dh t wc din 0 din 1 din 511 t ch 1211 f08.5 frbybsy# fce# fre# fad[7:0] d out d out d out t rr t rea t reh t rea t rp t rea t rhz t rhz t chr t rc
48 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 12.0 appendix 12.1 differences between sst ata flash disk controller and ata/atapi-5 specifications 12.1.1 idle timer the idle timer uses an incremental value of 5 ms, rather than the 5 sec minimum increment value specified in ata specifications. 12.1.2 recovery from sleep mode for ata flash disk controller devices, recovery from sl eep mode is accomplished by simply issuing another com- mand to the device. a hardware or software reset is not required.
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 49 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 12.2 reference design schematics figure 12-1: s chematic for ata f lash m odule , up to 640 mb yte d2 d3 ce# ce# iord# d11 sciclk d4 nand flash iocs16# intrq c6 0.1uf d0 u4 fad2 ce# fad0 d13 d11 d1 scidout fale extclkin nand flash extclkout nand flash d10 a2 wp_pd# d7 fwp# d6 u6 fr/b# (3.3v) d13 u1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 46 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 scidout scidin sciclk dnu vss (io) dnu dnu dnu dnu dnu dnu dnu dnu vdd (io) dnu dnu dnu dnu vss (io) intclken# dnu dnu vdd (core) por# fwp# vss (core) frdybsy# fre# fwe# fcle fale fad0 fad1 fad2 vss (io) extclkin extclkout vdd (io) fad3 fad4 fad5 fad6 fad7 vss (io) fce0# fce2# fce3# fce4# scien# d3 d11 d4 d12 vss (io) d5 d13 d6 d14 vddq (io) csel wp_pd# dasp# vss (io) intrq cs1fx# cs3fx# tie_dn tie_dn iord# tie_dn vss (core) iowr# tie_dn tie_up fce1# d10 d2 d9 d1 vss (io) d8 d0 d7 d15 vddq (io) iocs16# pdiag# vss (io) dnu tie_up a0 a1 a2 tie_dn reset# tie_dn tie_dn vddq (io) tie_dn tie_dn r1 390 vddq c7 0.1uf d15 fad3 vdd fad1 vdd vddq fce2# fwe# vdd fad7 iowr# d0 d9 c8 10pf (5.0v or 3.3v) d5 vdd cs3fx# d14 por# fad4 r4 0 r/b# optional circuit for external clock. remove r2, r6 and stuff r3, r4 if this circuit is used. d10 d8 r5 487 d2 csel d12 nand flash r2 0 r/b# d[15:0] r6 07-3-02 d12 fce1# vdd fce3# 55ld017a/b/c ata controller d4 fce0# u2 i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 ce# ale cle we# wp_pd# re# r/b# se# vss vcc d5 scidin# c3 0.1uf fre# ce# d9 r3 0 r/b# dasp# pdiag# + c1 10uf host interface csel wp_pd# dasp# intrq cs1fx# cs3fx# d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 reset# a2 a1 a0 pdiag# iocs16# iord# iowr# por# r/b# vddq d8 d7 c4 0.1uf nand flash a0 a1 scien# cs1fx# fad5 d6 u3 d15 fce4# reset# sci header 1 2 3 4 5 d1 fcle c5 0.1uf u5 vdd fad6 vddq d14 d3 + c2 2.2uf 1211 f09.1
50 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 12.3 bill of materials table 12-1: s ample b ill of m aterials item specification u1 sst55ld017a/b/c ata flash disk controller u2 to u6 nand flash media chip c1 10 f c2 2.2 f c3 to c7 0.1 f r1 390 t12-1.3 1211 table 12-2: o ptional c omponents item specification r2 to r4 0 r5 487 r6 0 c8 10 pf t12-2.0 1211 table 12-3: s upported nand f lash m edia nand flash media density manufacturer part number 32mb samsung km29w32000t samsung k9f3208w0a 64mb samsung km29u64000t samsung k9f6408u0b toshiba tc58v64ft 128mb samsung km29u128t samsung k9f2808u0b toshiba tc58128ft 256mb samsung km29u256t samsung k9f5608u0a toshiba tc58256ft 512mb samsung k9f1208u0m toshiba tc58512ft 1gb samsung k9k1g08u0m toshiba th58100ft t12-3.4 1211
eol product data sheet ata flash disk controller sst55ld017a / sst55ld017b / sst55ld017c 51 ?2006 silicon storage technology, inc. s71211-03-eol 4/06 13.0 product ordering information 13.1 valid co mbinations SST55LD017A-40-C-TQW sst55ld017a-40-i-tqw sst55ld017b-40-c-tqw sst55ld017b-40-i-tqw sst55ld017c-40-c-tqw sst55ld017c-40-i-tqw note: valid combinations are those products in mass production or will be in mass production. consult your sst sales representative to confirm av ailability of valid combinations and to det ermine availability of new combinations. sst 55 ld 017 a - 40 - c - tqw xx x x xxxx x xxx x xx x package modifier w = 100 leads package type tq = tqfp operation temperature c = commercial: 0c to +70c i = industrial: -40c to +85c frequency 40 = 40 mhz version device number 017 voltage l = 3.3v device family
52 eol product data sheet ata flash disk controller sst55ld017a / sst55l d017b / sst55ld017c ?2006 silicon storage technology, inc. s71211-03-eol 4/06 14.0 physical dimensions 100- lead t hin q uad f lat p ack (tqfp) sst p ackage c ode : tqw table 14-1: r evision h istory number description date 00 ? initial release mar 2002 01 ? added b and c versions jul 2002 02 ? end-of-life product data sheet for all parts in s71211 ? recommended replacement part for sst55ld017a is sst55ld019a (s71241) ? recommended replacement part for sst55ld017b is sst55ld019b (s71241) ? recommended replacement part for sst55ld017c is sst55ld019c (s71241) ? swapped product ordering and packaging diagram sections ? added a revision history table aug 2005 03 ? end-of-life product data sheet for all devices in s71211 ? recommended replacement device is sst55ld017x which can be found s71312 apr 2006 .45 .75 1.00 nominal 0?- 7? .95 1.05 .05 .15 detail note: 1. complies with jedec publication 95 ms-026 variant aed dimensions although some dimensions may be more stringent. 2. all linear dimensions are in millimeters (min/max). 3. coplanarity: 0.1 mm. 4. package body dimensions do not include mold flash. maximum allowable mold flash is 0.25 mm. top view 100-tqfp-tqw-0 0.17 0.27 0.50 bsc pin #1 identifier 14.00 bsc 16.00 bsc 14.00 bsc 16.00 bsc .09 .20 1.10 0.10 silicon storage technology, inc. ? 1171 sonora court ? sunnyvale, ca 94086 ? telephone 408-735-9110 ? fax 408-735-9036 www.superflash.com or www.sst.com

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